Example embodiments relate to a method of manufacturing a semiconductor device, and more particularly, to a method of manufacturing a semiconductor device having a dual gate.
According to the size reduction of a semiconductor device, a gate electrode of a metal-oxide semiconductor (MOS) transistor may be formed of a metal to increase a speed of the semiconductor device. This is because a metal such as tungsten has a very low resistance compared to that of polysilicon and silicide.
Also, according to the size reduction of a semiconductor device, a gate oxide layer for a MOS transistor is very thin so that a high-k dielectric layer instead of a silicon oxide layer may be used.
Meanwhile, in order to separately adjust threshold voltages of both an n-type metal-oxide semiconductor (NMOS) transistor and a p-type metal-oxide semiconductor (PMOS) transistor of a complementary MOS field effect transistor (CMOSFET), it is desired to independently control the work functions of materials forming gate electrodes of the NMOS and PMOS transistors.
For the independent control of the work functions, gates of the NMOS and PMOS transistors may be formed of materials having different work functions. However, in this case, a mask process is additionally required, and a high-k dielectric characteristic of a gate dielectric layer may be degraded since the gate dielectric layer may be damaged in a gate etching process.